Ascent – Day 1

1.Introduction to VLSI

  • ASIC design Flow
  • Scope and opportunities
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    2.Digital Design Problem solving

  • Combinational logic
  • Sequential logic
  • FSM
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    3.Verilog : My first Program

  • Structure of a module (ports, data types, assignments)
  • Testbench basics (initial, delays, system tasks, etc)
  • Compilation, Simulation and Waveform viewing
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    Ascent – Day 2

    1.Combinational circuit design

  • Always blocks
  • Assign statements
  • Examples
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    2.Sequential logic design

  • Clocks and Resets
  • Non-blocking statements
  • Examples
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    3.FSM

  • Case statements
  • Single sequential always block FSM
  • Examples
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    Ascent – Day 3,4

    1.Testbench components

  • Tasks and Functions
  • Waits and Delays
  • Fork-join
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    2.Verification using Verilog (mini-project)

  • DPRAM verification example
  • Test plan
  • Test case
  • Code Coverage
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